FIELD OF THE INVENTION
The present invention generally relates to integrated circuit ("IC") operational amplifiers. More specifically, the invention relates to cascode, two-stage operational amplifiers.
BACKGROUND OF THE INVENTION
Since the development of the transistor and integrated circuits, IC operational amplifiers ("op-amps") have been used in many applications related to such fields as telecommunications, audio/video technology, and computers. Complementary metal oxide semiconductor ("CMOS") operational amplifiers are a major category of IC op-amps that are used in a variety of applications. For example, CMOS op-amps are widely applied in high performance CMOS circuits, such as high speed/high resolution pipeline analog-to-digital ("A/D") converters.
In the application of op-amps, such as CMOS op-amps, the performance of the overall circuit is typically limited by the performance capability of the op-amp(s) used in the circuit. For example, the dynamic range performance and frequency response performance of a circuit using an op-amp are generally limited based on the open-loop DC gain and unity-gain frequency of the op-amp. High performance circuits require op-amps with high open-loop DC gain and a high unity-gain frequency.
There have been continuous efforts made to develop op-amps with higher open-loop DC gain and a higher unity-gain frequency to support the development of increasingly higher performing circuits. Typically, in this regard, there are prominent trade-offs that occur in op-amp performance. For example, an increase in gain performance typically results in an undesired decrease in frequency response performance. As another example, an increase in speed/unity-gain frequency typically results in the undesired increase of power consumption.
Various op-amp designs have been developed in an attempt to meet high performance requirements while minimizing performance trade-offs. These designs include folded-cascode op-amps with gain boosting and two-stage op-amps. Designs denoted by these names are known in the art, and need not be described herein. Yet, such designs have not been shown to fulfil the increasing demand for even higher performance applications. Thus, there is a need for an operational amplifier that performs with very high open-loop DC gain while maintaining a very high unity-gain frequency, in comparison to existing designs, but without significant increase of undesired parameters.
SUMMARY OF THE INVENTION
Certain objects, advantages, and novel features of the invention will be set forth in part in the description that follows and in part will become apparent to those skilled in the art upon examination of the following or may be learned with the practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
The present invention generally relates to integrated circuit ("IC") operational amplifiers. More specifically, the invention relates to cascode, two-stage operational amplifiers.
BACKGROUND OF THE INVENTION
Since the development of the transistor and integrated circuits, IC operational amplifiers ("op-amps") have been used in many applications related to such fields as telecommunications, audio/video technology, and computers. Complementary metal oxide semiconductor ("CMOS") operational amplifiers are a major category of IC op-amps that are used in a variety of applications. For example, CMOS op-amps are widely applied in high performance CMOS circuits, such as high speed/high resolution pipeline analog-to-digital ("A/D") converters.
In the application of op-amps, such as CMOS op-amps, the performance of the overall circuit is typically limited by the performance capability of the op-amp(s) used in the circuit. For example, the dynamic range performance and frequency response performance of a circuit using an op-amp are generally limited based on the open-loop DC gain and unity-gain frequency of the op-amp. High performance circuits require op-amps with high open-loop DC gain and a high unity-gain frequency.
There have been continuous efforts made to develop op-amps with higher open-loop DC gain and a higher unity-gain frequency to support the development of increasingly higher performing circuits. Typically, in this regard, there are prominent trade-offs that occur in op-amp performance. For example, an increase in gain performance typically results in an undesired decrease in frequency response performance. As another example, an increase in speed/unity-gain frequency typically results in the undesired increase of power consumption.
Various op-amp designs have been developed in an attempt to meet high performance requirements while minimizing performance trade-offs. These designs include folded-cascode op-amps with gain boosting and two-stage op-amps. Designs denoted by these names are known in the art, and need not be described herein. Yet, such designs have not been shown to fulfil the increasing demand for even higher performance applications. Thus, there is a need for an operational amplifier that performs with very high open-loop DC gain while maintaining a very high unity-gain frequency, in comparison to existing designs, but without significant increase of undesired parameters.
SUMMARY OF THE INVENTION
Certain objects, advantages, and novel features of the invention will be set forth in part in the description that follows and in part will become apparent to those skilled in the art upon examination of the following or may be learned with the practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
To achieve various objects and advantages, the present invention is directed to a novel op-amp circuit. In accordance with a preferred embodiment of the present invention, a two-stage op-amp circuit including a double-cascode telescopic op-amp circuit in the input stage and a fully-differential op-amp circuit in the output stage is provided.
One advantage of a preferred embodiment of the present invention is that it performs with a very high open-loop DC gain in comparison to existing op-amp circuits. Another advantage of a preferred embodiment of the present invention is that its significant increase in open-loop DC gain does not result in a decrease in its unity-gain frequency, as typically occurs in existing op-amp circuits. That is, a preferred embodiment of the present invention performs with a very high open-loop DC gain while also maintaining a very high unity-gain frequency. Yet another advantage of a preferred embodiment of the present invention is that, considering its very high open-loop DC gain and very high unity-gain frequency performance, it has no increase in power consumption and a significantly small increase in other undesirable operation parameters in comparison to existing op-amp circuits.
Other objects, features, and advantages of the present invention will become apparent to one skilled in the art upon examination of the following drawings and detailed description. It is intended that all such additional objects, features, and advantages be included herein within the scope of the present invention, as defined by the claims.
One advantage of a preferred embodiment of the present invention is that it performs with a very high open-loop DC gain in comparison to existing op-amp circuits. Another advantage of a preferred embodiment of the present invention is that its significant increase in open-loop DC gain does not result in a decrease in its unity-gain frequency, as typically occurs in existing op-amp circuits. That is, a preferred embodiment of the present invention performs with a very high open-loop DC gain while also maintaining a very high unity-gain frequency. Yet another advantage of a preferred embodiment of the present invention is that, considering its very high open-loop DC gain and very high unity-gain frequency performance, it has no increase in power consumption and a significantly small increase in other undesirable operation parameters in comparison to existing op-amp circuits.
Other objects, features, and advantages of the present invention will become apparent to one skilled in the art upon examination of the following drawings and detailed description. It is intended that all such additional objects, features, and advantages be included herein within the scope of the present invention, as defined by the claims.
Abstract
A two-stage op-amp circuit including a double-cascode telescopic op-amp circuit in the input stage and a fully-differential op-amp circuit in the output stage and having very high open-loop DC gain, very high unity-gain frequency, and relatively very low power consumption is presented. The input stage op-amp circuit and the output stage op-amp circuit are each comprised of a plurality of electrically connected MOSFET's. The input stage op-amp circuit provides very high gain, high input resistance, and large common mode rejection. The output stage op-amp circuit provides gain, low output resistance, and minimal output loss.
Claims
Therefore, having thus described the invention, at least the following is claimed:
1. An operational amplifier comprising:
an input stage comprising a first plurality of metal-oxide semiconductor field-effect transistors electrically connected in a double-cascode telescopic operational amplifier configuration; a positive input electrically connected to the input stage; a negative input electrically connected to the input stage; a first series circuit comprising a first coupling resistor and a first coupling capacitor electrically connected to the input stage; a second series circuit comprising a second coupling resistor and a second coupling capacitor electrically connected to the input stage; an output stage electrically connected to the first series circuit and to the second series circuit comprising a second plurality of metal-oxide semiconductor field-effect transistors electrically connected in a fully-differential operational amplifier configuration; a positive output electrically connected to the output stage, wherein a first load capacitor is electrically connected to the positive output; a negative output electrically connected to the output stage, wherein a second load capacitor is electrically connected to the negative output; a first plurality of bias inputs electrically connected to the input stage; and a second plurality of bias inputs electrically connected to the input and output stages.
2. An operational amplifier comprising:
an input stage comprising a first plurality of metal-oxide semiconductor field-effect transistors electrically connected in a double-cascode telescopic operational amplifier configuration; an output stage electrically coupled to the input stage and comprising a second plurality of metal-oxide semiconductor field-effect transistors electrically connected in a fully-differential operational amplifier configuration.
3. The operational amplifier of claim 2 wherein the output stage is electrically coupled to the input stage by a first circuit comprising a first coupling resistor and a first coupling capacitor and by a second circuit comprising a second coupling resistor and a second coupling capacitor.
4. The operational amplifier of claim 2 wherein a positive input and a negative input are electrically connected to the input stage, a positive output having a first load capacitor and a negative output having a second load capacitor are electrically connected to the output stage, a first plurality of bias inputs are electrically connected to the input stage, and a second plurality of bias inputs are electrically connected to the input stage and the output stage.
5. A method for providing an operational amplifier having a very high open-loop DC gain, a very high unity-gain frequency, and a relatively very low power consumption comprising the steps of:
providing an input stage having very high gain, high input resistance, and large common mode rejection and comprising a first plurality of metal-oxide semiconductor field-effect transistors configured in a double-cascode telescopic operational amplifier configuration; and
providing an output stage electrically coupled to the input stage having gain, low output resistance, and a minimal output loss characteristic and comprising a second plurality of metal-oxide semiconductor field-effect transistors configured in a fully-differential operational amplifier configuration.
6. The method of claim 5, further comprising the step of coupling the output stage to the input stage through a first circuit comprising a first coupling resistor and a first coupling capacitor and through a second circuit comprising a second coupling resistor and a second coupling capacitor.
1. An operational amplifier comprising:
an input stage comprising a first plurality of metal-oxide semiconductor field-effect transistors electrically connected in a double-cascode telescopic operational amplifier configuration; a positive input electrically connected to the input stage; a negative input electrically connected to the input stage; a first series circuit comprising a first coupling resistor and a first coupling capacitor electrically connected to the input stage; a second series circuit comprising a second coupling resistor and a second coupling capacitor electrically connected to the input stage; an output stage electrically connected to the first series circuit and to the second series circuit comprising a second plurality of metal-oxide semiconductor field-effect transistors electrically connected in a fully-differential operational amplifier configuration; a positive output electrically connected to the output stage, wherein a first load capacitor is electrically connected to the positive output; a negative output electrically connected to the output stage, wherein a second load capacitor is electrically connected to the negative output; a first plurality of bias inputs electrically connected to the input stage; and a second plurality of bias inputs electrically connected to the input and output stages.
2. An operational amplifier comprising:
an input stage comprising a first plurality of metal-oxide semiconductor field-effect transistors electrically connected in a double-cascode telescopic operational amplifier configuration; an output stage electrically coupled to the input stage and comprising a second plurality of metal-oxide semiconductor field-effect transistors electrically connected in a fully-differential operational amplifier configuration.
3. The operational amplifier of claim 2 wherein the output stage is electrically coupled to the input stage by a first circuit comprising a first coupling resistor and a first coupling capacitor and by a second circuit comprising a second coupling resistor and a second coupling capacitor.
4. The operational amplifier of claim 2 wherein a positive input and a negative input are electrically connected to the input stage, a positive output having a first load capacitor and a negative output having a second load capacitor are electrically connected to the output stage, a first plurality of bias inputs are electrically connected to the input stage, and a second plurality of bias inputs are electrically connected to the input stage and the output stage.
5. A method for providing an operational amplifier having a very high open-loop DC gain, a very high unity-gain frequency, and a relatively very low power consumption comprising the steps of:
providing an input stage having very high gain, high input resistance, and large common mode rejection and comprising a first plurality of metal-oxide semiconductor field-effect transistors configured in a double-cascode telescopic operational amplifier configuration; and
providing an output stage electrically coupled to the input stage having gain, low output resistance, and a minimal output loss characteristic and comprising a second plurality of metal-oxide semiconductor field-effect transistors configured in a fully-differential operational amplifier configuration.
6. The method of claim 5, further comprising the step of coupling the output stage to the input stage through a first circuit comprising a first coupling resistor and a first coupling capacitor and through a second circuit comprising a second coupling resistor and a second coupling capacitor.
DAHIANA ALEJANDRA ROSAES HERNÁNDEZ
EES
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